Descripción
Low Logic Circuit Power Dissipation
High-Current Sourcing Outputs (Up to 25 mA)
Latch Storage of Code
Blanking Input
Lamp Test Provision
Readout Blanking on all Illegal Input Combinations
Lamp Intensity Modulation Capability
Time Share (Multiplexing) Facility
Supply Voltage Range = 3.0 V to 18 V
Capable of Driving Two Low-power TTL Loads, One Low-power Schottky TTL Load or Two HTL Loads Over the Rated Temperature Range
Chip Complexity: 216 FETs or 54 Equivalent Gates
Triple Diode Protection on all Inputs
These devices are available in Pb-free package(s). Specifications herein apply to both standard and Pb-free devices.
| Atributo | Valor |
|---|---|
| Tipo de Montaje | Montaje superficial |
| Tipo de Encapsulado | SOIC |
| Conteo de Pines | 16 |
| Dimensiones | 10 x 4 x 1.5mm |
| Tensión de Alimentación Máxima de Funcionamiento | 18 V |
| Temperatura Máxima de Funcionamiento | +125 °C |
| Temperatura de Funcionamiento Mínima | -55 °C |
| Tensión de Alimentación de Funcionamiento Mínima | 3 V |
| Estándar de automoción | AEC-Q100 |
Valoraciones
No hay valoraciones aún.